The Fire Code is created by multiplying two polynomials; an irreducible polynomial of degree m, and a second polynomial X21-1+1. Newer protocols devised for high-speed serializer/deserializers (SERDES) make use of burst error correction codes, such as the Fire code, to correct burst errors. The Institute of Electrical and Electronics Engineers (IEEE) 802.3ap standard calls for a shortened 32-bit Fire code capable of correcting bursts of up to 11-bits and the Optical Internetworking Forum's (OIF) Common Electrical Interface for 6 Gbps SerDes calls for a 24-bit Fire code capable of correcting bursts of up to 7-bits. The 802.3ap Fire code is usually described as a (2112,2080) Fire Code which is a shortened version of the (42987,42955) code. The OIF CEI-P code is a (1584,1564) Fire code which is shortened from the (1651,1631) Fire code. The number of parity bits in the OIF code is actually 20-bits. These designs use a parallel implementation of the Meggitt Error Trapping Decoder.
A classic Error Trapping Decoder, for burst error correcting codes, works by using the entire generator polynomial of an (n,k) code and cyclic shifting through up to n values until the error is trapped in the syndrome register. The error is trapped when the shift register contains zeros in all registers except for a contiguous group of up to m registers, where m is the burst error correcting capability of the code. The number of shifts defines the location of the error and the group of m registers defines the error value.
Implementations of the OIF-CEI-P and 10 GBASE-KR use a parallel implementation of the Meggitt Error Trapping Decoder in Field Programmable Gate Arrays (FPGAs), Application Specific Integrated Circuits (ASICs), or full-custom integrated circuits. The Fire code, used in the 10 GBASE-KR standard, has an implementation complexity of approximately 14,000 gates. By today's standards, this may not sound like a large design but many implementations may use 100 or more instances of the decoder and the total implementation complexity could require over 1.4 million gates. The increased gate count adds to the cost and power of the integrated circuit.